DOMINO · Design Oriented ModellINg for flexible electrOnics

Design Oriented ModellINg for flexible electrOnics

The aim of this RISE research project is, after identifying the design and modelling needs for the printed and flexible electronics industry, to develop and compact models for two of the most promising devices in this field: organic and amorphous oxide semiconductor (AOS) Thin Film Transistors (TFTs). Design software with models for these targeted devices will enable future engineers to capture new opportunities for printed and flexible electronics. The scientific, technical and industrial objectives of our project are to: · Create generic open source compact models for OTFTs and AOS TFTs targeted at innovative printed and flexible electronics applications. · Validate the models of OTFT and AOS TFT technologies (for device and circuit design level) developed by manufacturing partners. · Integrate the model in commercial EDA (Electron Design Automation) tools and implement standardised parameter extraction standards. · Demonstrate the model for the design of printed or flexible OTFT and AOS TFT circuits. · Develop a prototype printed or flexible circuit for model validation. · Disseminate the model for the European Thin, Organic and Large Area Electronics design community. The main impact of our project is to bring a change of flexible electronics development paradigm, from a technology push to an application driven mode, by providing accurate compact OTFT and AOS TFT models to designers. During the course of this project partners will undertake a number of fabrication, measurement and design iterations to address issues in the behaviour and modelling of organic and oxide semiconductor devices. These are aimed at improving the performance of these devices and circuits incorporating them. Fundamental material dependent microscopic and transport models will be extended to physical macroscopic device level models, from which novel compact models will be developed and implemented for circuit design. The research carried out in this project will lead to the development of enhanced device level and circuit level models. This will result in accurate models that will be made accessible to the industry and future designers.

Data: CORDIS, © European Union