H2020Individual fellowship2018–2020

SAPHIR · Scalable DSP algorithms for high performance hardware applied to 5G MaMi systems

Horizon 2020 — Marie Skłodowska-Curie Actions

Duration
2018-06-01 → 2020-05-31
EU contribution
€178,157
Participants
1
Scheme
MSCA-IF-EF-SE

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Results in brief

Scalable DSP algorithms for high performance hardware applied to 5G MaMi systems

In modern telecommunication systems, the digital baseband processing unit (or digital signal processor – DSP) is of paramount importance for the overall performance and it consumes a significant part of the total power. The goal of this project was to replace power-hungry traditional digital baseband processors by employing new methodologies and techniques, which emerged in the development of quantum algorithms for scientific computing, for obtaining efficient hardware implementations. Information and communication technologies (ICTs) have enabled a transformative and disruptive change across industries and society, catalyzing an entirely new economic model. The networked society promises to deliver growth and prosperity based on greater social cohesion and environmental sustainability. The current communication industry, supported by the European Union, is starting to deploy 5G systems. However, insufficient attention is paid to the amount of energy these systems may consume. Without increasing the energy efficiency, the total electricity consumption of the telecom industry is estimated to be responsible for a substantial amount of the global electricity consumption by 2040. Replacing power hungry digital baseband processors requires a methodology for identifying critical parts that can be improved and efficient algorithms for carrying out the tasks of the critical parts. In earlier work, we developed such a methodology and techniques to derive efficient quantum algorithms for scientific computing. The scientific challenge is to export the benefits of quantum computation to custom digital hardware that implements the baseband processing in telecommunication systems. This requires algorithms derived using simple, or elementary, operations for increased efficiency. Their implementation in mobile and embedded systems requires fixed precision arithmetic satisfying the accuracy and efficiency targets. Possibly new algorithms have to be designed and combined with others to form a digital library for DSP. An additional goal is to have a priori available accuracy and cost estimates for the individual algorithms so they can be combined conveniently for deriving the overall DSP performance. Obtaining an efficient DSP block for an RF Pulse Width Modulation (RF-PWM) is sought as part of the development of high performance DSP for 5G MaMI systems, which is an IFAT strategic aim.

Data: CORDIS, © European Union

Project objective

There is persistent demand for radical advancements in telecommunication systems. The digital baseband processing unit (or Digital Signal Processor – DSP) is of paramount importance for the overall performance and it consumes a significant part of the total power. Breakthroughs in terms of accuracy, speed and efficiency are required in custom DSP implementations. To this end we propose to employ ideas that lead to advances in quantum algorithms for scientific computing to obtain silicon integrated circuit implementations meeting the performance expectations. Our experience and the similarities in the efficiency and accuracy requirements between such quantum algorithms and custom silicon-based integrated circuit design have not been exploited. This has a huge potential for obtaining high performance DSP cores in 5G MaMi systems.We propose to derive DSP algorithms and corresponding digital circuits with performance guarantees in terms of accuracy and speed. In some cases we will be deriving entirely new algorithms and circuits. In others we will investigate the degree to which the existing quantum algorithms for scientific computing can be used as a basis to derive efficient custom integrated circuits for DSP. To address the efficiency requirements and to control the error propagation we propose a modular approach. Algorithms will be composed by combining modules performing sub-tasks. Digital circuits with a priori known error and cost characteristics will be used to implement the different modules. This allows the comparison of the trade-offs between implementation alternatives and paves the way toward fully automatic overall resource optimization in DSP design. The proposed approach will provide a new and sound methodology to design and test custom integrated circuits for next generation communication systems (5G).

Original text from CORDIS.

Participants

  • INFINEON TECHNOLOGIES AUSTRIA AG · VillachCoordinatorAustria

Links

Data: CORDIS, © European Union