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H2020Doctoral network2020–2023

DESIGN-EID · Defect Simulation and Material Growth of III-V Nanostructures- European Industrial Doctorate Program

Horizon 2020 — Marie Skłodowska-Curie Actions

Duration
2020-01-01 → 2023-12-31
EU contribution
€878,989
Participants
3
Scheme
MSCA-ITN

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Results in brief

Defect Simulation and Material Growth of III-V Nanostructures- European Industrial Doctorate Program

-What is the problem/issue being addressed? DESIGN-EID was an innovate programme providing a unique research training opportunity for a cohort of 3 Early Stage Researchers (ESRs) in the novel and multidisciplinary field of semiconductor opto-electronic technology. The DESIGN-EID project offered strategic training opportunities with exceptional career development prospects in academia and industry. There is great interest in integrating monolithically or heterogeneously compound semiconductors on silicon to exploit their complementary properties. Particularly to exploit the direct bandgap of III-Vs for optoelectronic devices densely integrated with CMOS. However, lattice and thermal mismatch between materials makes epitaxial growth on silicon challenging. In this project, we have addressed the challenges associated with the formation of defects and material growth in compound semiconductors such as III-Vs, as well as their impact on device performance. Defects may have been exploited in the development of novel devices, but more often, we wished to mitigate their deteriorating impact on electro-optic device performance by growth and materials optimization. The project combined experimental work at IBM Research Zurich (IBM) with modelling and simulation efforts at Device Modelling Group (University of Glasgow) and Synopsys QuantumATK (ATK, Denmark). -Why is it important for society? We identified an increasing demand for reliable and performant electronics circuits, such as those used in our cell phones, computers, or our cars to cite a few. This demand will continue to grow in the coming decades, which challenges the semiconductor industry to develop novel materials and fabrication processes, and reduce not only the overall product cost but also the time to market for new devices and technologies. Based on our work, the fabrication process of a specific class of semiconductor materials (called “ III-Vs” ) was improved significantly, and the material properties were tailored to enhance the electronic devices' performances. Because such materials and electronic devices are used in every electronic chip currently produced, these new chips need to consume less power and be faster and more reliable. This will lead to faster internet connections, reducing the power consumption in the data centres and building a new type of computer architecture such as quantum computers. -What are the overall objectives? We established an industrially driven training network in advanced semiconductor materials development and simulation. Developed a simulation framework to capture the complexities of growth and defect formation in compound semiconductors. Experimented validation of modelling concepts via fabrication and characterization of electronic and photonic III-V devices.

Data: CORDIS, © European Union

Project objective

In semiconductor technology and applications today, we are increasingly observing a shift from the pure silicon CMOS technology towards hybridisation of function in terms of bringing in sensors, power, memory and photonics functionality on the same chip. In particular, there is a great interest in the heterogeneous and monolithic integration of III-V materials and other complex semiconductors, such as III-Nitrides and SiC on Si substrate. However, the direct growth of III-V materials on silicon inevitably will lead to crystal defects that significantly decreases performance of novel devices. To overcome this main technological challenge and to make this new technology financially viable, the most cost-effective and time-effective approach is to combine experimental and simulation work, which indeed is the main aim on this project – DESING-EID. This will be achieved by addressing the following objectives. The first objective of DESIGN-EID is to train three young ESRs who will bridge the gap between predictive simulations, experimental materials and device development by developing simulation tools for prediction of crystal growth as a function of process conditions. Secondly, completely eliminating defects in compound semiconductors is likely not achievable, therefore a simulation framework providing an accurate evaluation of their impact on device performance will be essential for designing devices and materials minimizing their impact. Furthermore, semiconductor defects in semiconductors may be exploited for their unique electronic properties if their presence and properties are controlled. For example, vacancies might be used to implement Qu-bits, whereas extended defects, such as dislocations, can provide unique transport properties. Hence, the last objective of the DESIGN-EID project focuses on experimental control and accurate simulation of the impact of defects on electronic and photonic device performance.

Original text from CORDIS.

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Data: CORDIS, © European Union