CPSULPVLSI · Development of novel classes of high performance microelectronic systems on chip for ultra low power wireless applications

Final Activity Report Summary - CPSULPVLSI (Development of Novel Classes of High Performance Microelectronic Systems on Chip for Ultra Low Power Wireless Applications)

Through observation of the latest trends in worldwide literature one can notice a high demand for ultra low power miniaturised devices in all areas of human life. Such devices are applied in modern medical equipment, allowing for improvement of medical healthcare, telecommunication, multimedia and numerous other fields. Such novel systems are often realised as wireless sensor networks (WSN) or wireless body sensor networks (WBSN), in which particular nodes must operate at very low energy consumption e.g. scavenged from the environment. This project focused on the development of new classes of microelectronics circuits, both analogue and digital, for application in modern ultra low power devices. Many new circuit solutions were proposed, from small elementary blocks to more advanced circuits and entire very large scale of integration (VLSI) systems. The development of the circuits required a comprehensive study on all levels, from system level simulations in software models and transistor level design to chip implementation and laboratory tests. The new circuits that were developed during the project realisation included: 1. switched capacitor (SC) and switched current (SI) finite impulse response (FIR) and infinite impulse response (IIR) filters and filter banks; 2. analogue, both linear and nonlinear, two-dimensional, programmable, asynchronous and parallel image filters, which enabled fast image filtering at very low energy consumption; 3. ultra low power parallel analogue Kohonen neural network for portable devices for analysis of electrocardiography (ECG) and electromyography (EMG) signals in WBSN; 4. fuzzy-logic analogue neural networks based on the Lukasiewicz multi-valued logic; 5. current-mode, successive approximation, analogue-to-digital converters (SAR ADC) for applications in WSN and WBSN or X-ray imaging applications; 6. analogue front-end (AFE) read-out ASICs for X-ray medical imaging applications, with new blocks such as asynchronous analogue multiplexer, peak detector and pulse shaping filter being also created. One of the most interesting and advanced projects that was realised during the scholarship was the abovementioned analogue Kohonen neural network. The prototype chip was a very complex system with more than 3 000 transistors which were used mostly in analogue blocks. A fast adaptation mechanism was implemented inside the chip, so that the network could work as an autonomous system. During the laboratory tests the prototype network with three inputs and four neurons, i.e. 12 calculation channels operating in parallel, clocked at 2 MHz clock, achieved a calculation capacity comparable with a standard 2 GHz personal computer (PC), while consuming only 700 µW of power. This was even five orders of magnitude less than the power dissipated by this computer. Such parameters created the possibility to realise ultra low power systems with hundreds of neurons working in parallel, having the computational capacity of hundreds PCs.

Data: CORDIS, © European Union