NeMeCo · Near Memory Computing

Near Memory Computing

The key scientific objective of the NeMeCo project is to enable the design of a power-efficient High Performance Computing systems for big data type of applications based on Near-Memory Computing (NMC). Big data applications are often memory bound (i.e., memory access time dominates the other computation time) and/or require a huge memory bandwidth. Near-memory processing is one of the few real solutions to address the current scaling issues in HPC (High Performance Computing) systems in order to realize Exascale computers that are needed for near-future big data workloads. However, NMC is still in its infancy. Before it can be established as an essential component of HPC systems and be exploited for accelerating Big-data workloads, multiple challenges have to be addressed. Besides the design of the NMC device itself, this includes 1) its integration into the overall computer system architecture, 2) investigate how multiple NMC devices can work together to scale to larger data volumes, and 3) how such a hybrid system can be effectively programmed to maximize performance and minimize power consumption at the system level. Key objectives for the 3 ESRs are to prepare and publish journal papers about: 1.New NMC architecture(s); 2.Adequate programming models for NMC; 3.New compiler technology for NMC; 4.New compile- and run-time optimization techniques for NMC; 5.Application of NMC to real-world problems. The consortium is composed by two beneficiaries Eindhoven University of Technology (TU/e), IBM Research GmbH Zurich Research Laboratory (IBM) and three associative partner organisations: Dutch institute for radio astronomy (ASTRON), Swiss Federal Institute of Technology in Zurich (ETH-Z) and Dresden university of technology (TUDresden).

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