H2020Индивидуална стипендия2017–2019

Wave-Locked Loop · Wave-Locked Loop for Frequency Synthesis (WLL)

„Хоризонт 2020“ — Действия „Мария Склодовска-Кюри“

Период: 2017-04-01 → 2019-03-31
Финансиране от ЕС: 175 866 €
Участници: 1
Схема: MSCA-IF

Линиите свързват координатора с партньорите.

Накратко на български

Новият тип синтезатори на честота (WLL) анализират цялата форма на вълната, а не само фазата ѝ, за да генерират по-точни сигнали. Това помага за по-бърза работа на безжичните комуникации и по-дълъг живот на батериите в мобилните устройства.

Този кратък обзор е генериран от изкуствен интелект

Кратко обяснение, генерирано от езиков модел по текста на CORDIS. Оригиналът е по-долу.

Резултати накратко

Wave-Locked Loop for Frequency Synthesis (WLL)

Today, wireless communication has changed the way people lived and turn a mobile device into a necessary equipment in daily life. This has driven the cellular phone industry to support Bluetooth wireless personal area networking and 4G communication where low-cost prototype with low power for RF transceivers, as well as processors are integrated in a low-cost and low-power form factor .This project aims to break this tradeoff in conventional PLLs that constraints the amount of noise rejected by the loop as well as the achievable lock time, while maintaining long battery life time at low cost. Instead of detecting only the phase information for a subsequent correction in each reference cycle [see Fig. 2 (c)], waveform information is captured which is composed of amplitude, phase, and frequency information; hence the term wave-locked loop (WLL). The WLL would be able to provide precise frequency with much faster locking when compared to conventional PLLs. To achieve optimum performance, oscillator phase noise is one of the most important design parameters (out-of-band region). Moreover, design of low-flicker-noise LC DCO and small-sized ring oscillator with phase noise filtering will be investigated. Thus, the research objective of this fellowship program is to produce an innovative frequency synthesizer and clock generation systems using wave-locked loop, which includes the study of oversampling of oscillator waveform for fine phase detection, the study of phase-noise reduction in ring oscillator using discrete-time filtering, the study of mm-wave oscillator with flicker noise corner reduction, and system integration for wave-locked loop system.

Текст от CORDIS, на английски · Данни: CORDIS, © Европейски съюз

Цел на проекта

Conventional analog Phase-Locked Loop (PLL) occupies large area and is difficult to be reconfigured due to a bulky loop filter. In 2005, phase-domain all-digital phase-locked-loop (ADPLL) was proposed. It measured output phase of digitally controlled oscillator (DCO) using a time-to-digital converter (TDC). Unfortunately, designing fine-resolution TDC and wide dynamic range is power-consuming. In this project, instead of utilizing single sampling point per reference clock, we propose to oversample and digitize oscillator oscillator waveform which will produce enough digital samples to reconstruct, now in digital domain, the waveform and compare against a model waveform which will give precise frequency/phase and amplitude information. Thus, it is called, wave-locked loop (WLL) that will result in low-in-band phase noise, fast lock time, and wide-loop bandwidth that is no longer limited by reference clock. Preliminary data shows finer than 1-degree phase resolution even with 10% delay error in sampling clocks, and distortion from input waveform. This shows possibility to break the tradeoff in traditional TDC and improve robustness over PVT variations. Moreover, the design of building blocks which includes low-flicker-noise mm-wave LC Digitally-Controlled Oscillator (DCO) and small-sized ring oscillator with phase noise filtering will be investigated. Thus, this fellowship program studies an innovative frequency synthesizer and clock generation systems using wave-locked loop, which includes the study of oversampling of oscillator waveform for fine phase detection, the study of phase-noise reduction in ring oscillator using discrete-time filtering, the study of mm-wave oscillator with flicker noise corner reduction, and system integration for wave-locked loop system. The proposed synthesizer will be tapeout using advanced CMOS technology and will be measured to verify their performance.

Оригинален текст от CORDIS (на английски).

Участници

UNIVERSITY COLLEGE DUBLIN, NATIONAL UNIVERSITY OF IRELAND, DUBLIN · DublinКоординаторИрландия