H2020Индивидуална стипендия2018–2020

MoCRIV · Modeling critical reliability issues in VLSI technologies beyond 2020

„Хоризонт 2020“ — Действия „Мария Склодовска-Кюри“

Период: 2018-08-22 → 2020-08-21
Финансиране от ЕС: 172 800 €
Участници: 1
Схема: MSCA-IF-EF-ST

Линиите свързват координатора с партньорите.

Накратко на български

Моделите на надеждността при транзисторите изследват проблеми като прегряването и износването на материалите в микрочиповете. Това помага за създаването на по-стабилни и издръжливи електронни устройства от следващо поколение.

Този кратък обзор е генериран от изкуствен интелект

Кратко обяснение, генерирано от езиков модел по текста на CORDIS. Оригиналът е по-долу.

Резултати накратко

Modeling critical reliability issues in VLSI technologies beyond 2020

Although transistor scaling has been actively exploited for more than 50 years, MOSFET technology has still to go for many years. However, any further developments and progress can only be achieved by acquiring and retaining a thorough understanding of the microscopic physics underlying the behavior of novel devices/materials. Unlike the more tangible product parameters, such as performance or power consumption, reliability specifications are often neither disclosed nor considered by the typical end-user. However, reliability is the essential metric required for the introduction of each new VLSI node. Therefore, the primary goal of this project has been to develop and validate a physics-based modeling framework which captures the main reliability phenomena to obtain realistic reliability projections for future nodes. This framework should accurately model three main reliability issues in modern transistors – namely bias temperature instability (BTI), hot-carrier degradation (HCD), and self-heating (SH) – in devices with different channel materials, various geometries, and stressed using a broad range of conditions. Within 24 months of the project, MoCRIV has achieved most of its research goals. The training and public outreach activities have been achieved as well. In the initial research plan, the objective 4 was devoted to reliability concerns in InGaAs transistors. However, these devices were removed from the IMEC roadmap because of large sample-to-sample variability found in them, therefore objective 4 has been revised to focus on HCD induced variability in Si FETs. The following project objectives have been addressed: 1. A starting point of the project was coupling BTI and HCD models for planar transistors, followed by validation of the unified model over a wide range of stress conditions. 2. The unified model for BTI and HCD was then extended to 3D transistors. In these structures, SH is inevitable and its impact on device degradation was captured by the extended model. 3. Further expansion of the modeling framework was focused on inclusion of HCD in SiGe/Ge devices. For this, defects responsible for HCD were identified. This goal was achieved with ab initio calculations. 4. Based on the deterministic version of our HCD model, a stochastic approach to HCD modeling was developed and applied to HCD in Si devices.

Текст от CORDIS, на английски · Данни: CORDIS, © Европейски съюз

Цел на проекта

This proposal presents an interdisciplinary, forward looking, training-by-research plan in the field of physical reliability modeling of emerging transistors and materials beyond 2020. Its main goal is development and validation of a simulation framework which self-consistently considers the main reliability phenomena including bias temperature instability, hot-carrier degradation, and self-heating. These effects were suggested to be the response of interface and oxide defects/precursors which can be activated by different driving forces determined by device operating conditions and specifics of the device topology. Thus, the core of this project will be put on a detailed microscopic description of the properties of defects/precursors, which will be studied experimentally and theoretically.Within this defect-centric paradigm we will address reliability issues in devices with emerging architectures, i.e. fin and nanowire transistors, high-k gate dielectrics, and high mobility channel materials such as SiGe, Ge, and III-V alloys. The unifying model building on the microscopic defect properties will be validated over a wide range of device bias conditions. We will capture the parasitic effect of self-heating which has a strong impact on the energetic distribution of hot carriers and hence on hot-carrier degradation. Special attention will be paid to time-dependent variability of device characteristics which is a response of nanoscale devices on activation/deactivation of individual defects. Knowledge acquired within this project will be valuable for applied and fundamental physics, material science, computational chemistry, electrical engineering, VLSI technology, and circuit design. The research and training activities will enhance applicant’s future career by broadening his professional skills and expertise, expose him to industrial requirements, and open new perspectives for future collaboration with industry.

Оригинален текст от CORDIS (на английски).

Участници

INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM · LeuvenКоординаторБелгия