H2020Индивидуална стипендия2019–2022

PALMERA · Low Power and Fault Tolerant Cache Memory Design through a Combination of Hardware and Software Approaches

„Хоризонт 2020“ — Действия „Мария Склодовска-Кюри“

Период: 2019-05-01 → 2022-01-15
Финансиране от ЕС: 208 400 €
Участници: 1
Схема: MSCA-IF

Линиите свързват координатора с партньорите.

Накратко на български

Паметта на микропроцесорите се изследва чрез софтуер и хардуер, за да се предпази от грешки при радиация, например в сателити. Това помага за намаляване на консумацията на енергия и повишаване на надеждността на електрониката в опасни среди.

Този кратък обзор е генериран от изкуствен интелект

Кратко обяснение, генерирано от езиков модел по текста на CORDIS. Оригиналът е по-долу.

Резултати накратко

Low Power and Fault Tolerant Cache Memory Design through a Combination of Hardware and Software Approaches

Electronic circuits, such as microprocessors, are today used in all types of environments, including space and locations on earth where they are exposed to radiation. We then risk that high energy particles enter the circuit and cause a malfunction, possibly with critical outcome for a satellite or other equipment that the microprocessor controls. The memory of a microprocessor is particularly vulnerable, since a change to a stored value will be remembered and is not simply an instantaneous event. Another major challenge for modern electronic circuits is their power consumption. This is the case from the smallest sensor node, running on, e.g., solar energy harvesting or irreplaceable coin cell batteries, through cell phones needing recharge frequently, to large data centres, where both the electricity bill and the heating of the microprocessors themselves are problems. One approach to save power is to reduce the supply voltage of the circuit. A consequence of this is reduced performance, however. A possible solution is to perform dynamic adaptation while the system is running in accordance with the current requirements of the system. The goal of the PALMERA project is to design a low power and fault tolerant microprocessor memory through a combination of hardware and software approaches. We will develop circuit level solutions where each memory cell is made robust against radiation strikes. How much energy from a particle the memory can tolerate, is however dependent on its supply voltage. We will therefore control the circuit level solution with software that detects the current radiation status. It adapts the supply voltage so that we save power when no high energy particles are hitting the memory, thus saving power, and increase the supply voltage when high radiation tolerance is required.

Текст от CORDIS, на английски · Данни: CORDIS, © Европейски съюз

Цел на проекта

PALMERA will address the low power and fault tolerant cache memory design bottleneck through a combination of hardware and software approaches. The proposal has two research directions: (1) Develop a cache memory hardware equipped with novel circuit designs to keep the reliability during voltage scaling. (2) Leverage the software application level to manage energy consumption. A methodology will be developed that enables the programmer to identify non-critical data structures and program phases that are not memory-bound. Through a system scenario design methodology, this information is used to manage the settings of the underlying novel hardware to increase error resilience and save energy. The focus is on memories implemented for embedded systems in areas such as medical imaging and space applications, typically having strict requirements for both energy consumption and reliability. These types of applications are increasingly becoming multitasked and dynamic; hence, data intensive and fluctuating with respect to resource requirements. Available static analysis and worst-case design margins cannot any longer meet the power and reliability constraints. Compared to previous techniques that typically focus on either hardware or software when optimizing for both energy and reliability, PALMERA adopts a multidisciplinary holistic approach where hardware and software levels of the system are combined. Working towards these challenging project goals not only moves the research front forward, but also gives the Experienced Researcher excellent opportunity to develop her skills and career potential. The combination of PALMERA research, with high quality training at the host institution and during secondment, strengthens her knowledge and experience and provides the best opportunity for her to gain a position as a senior researcher in industry or academia. The goal is for PALMERA to be an enabler for the next step, being a proposal for a European Research Council grant.

Оригинален текст от CORDIS (на английски).

Участници

NORGES TEKNISK-NATURVITENSKAPELIGE UNIVERSITET NTNU · TrondheimКоординаторНорвегия