H2020Индивидуална стипендия2020–2022

2D-HETERO · Synthesis and integration of wafer-scale van der Waals heterostructures for industrial nanoelectronic devices

„Хоризонт 2020“ — Действия „Мария Склодовска-Кюри“

Период: 2020-05-01 → 2022-04-30
Финансиране от ЕС: 166 320 €
Участници: 1
Схема: MSCA-IF-EF-ST

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Накратко на български

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Този кратък обзор е генериран от изкуствен интелект

Кратко обяснение, генерирано от езиков модел по текста на CORDIS. Оригиналът е по-долу.

Резултати накратко

Synthesis and integration of wafer-scale van der Waals heterostructures for industrial nanoelectronic devices

Abundant-data computing such as big-data analytics, artificial intelligence (AI) and Internet of Things (IoT) demand extreme energy efficiency and concomitant improvement of cost performance of the electronic systems. Field-effect transistors (FETs) represent the fundamental building blocks for modern computer processors. The number of transistors in a typical microprocessor has followed a remarkable exponential growth since the 1960s, a trend known as Moore’s law. By making the device smaller, more transistors can be packed into a single chip with much improved performance and reduced cost. The continued miniaturization of silicon microelectronics has fuelled the exponential growth of the integrated circuits for over half a century. Today, as silicon transistors enter the sub-10-nm technology node with increasing technical challenges, the exploration of alternative device geometries or new channel materials is ever more important for future processor chip. Atomically thin two-dimensional (2D) semiconductors have attracted tremendous interest as a new channel material that could facilitate continued transistor scaling. To benefit from continuous scaling, the performance of the scaled 2D transistors needs to outperform Si technology nowadays. However, significant efforts are still required for channel material deposition, gate stack development, contact resistance reduction and CMOS integration, etc. The goal of 2D-HETERO project is to deposit high-quality and large wafer-scale 2D materials by CVD approach and integrate them in high-performance logic devices fabricated using industry-relevant tools and processes, and then enhance the device performance, yield and uniformity. As planned, the project duration was 24 months and during this period, 2D-HETERO has been able to address most of the sub-objectives and achieve the set goals under corresponding work packages (WPs). In order to best align the goal of 2D-HETERO project with emerging R&D challenges and needs in the semiconductor industry and also the resources in Exploratory Logic Program at imec, the overall research plan carried out in the project was particularly adapted and focused on the following sub-objectives. The covered sub-objectives were grouped into 2 WPs as described below: WP1: CVD growth of uniform, wafer-scale and high-quality 2D transition metal dichalcogenides (TMDs) WP2: Fabrication and characterization of scalable 2D TMDs based FETs for high performance logic application

Текст от CORDIS, на английски · Данни: CORDIS, © Европейски съюз

Цел на проекта

Moore’s law has enabled the $4 trillion worldwide IT industry to nearly double the performance and functionality of digital electronics roughly every two years within a fixed cost and area. However, the International Semiconductor Technology Blueprint (ITRS) predicts that the technological underpinnings for Moore’s law will end by 2025. IRTS points out that two-dimensional (2D) materials will bring new opportunities for the Post-Moore Era, especially for the CMOS technology beyond 5 nm node. However, very few 2D materials based electronic products are available commercially over the decades of study. With the scaling-down of the electronic devices, it is urgent for academia and industry to seek ways to integrate 2D materials in practical and commercial electronic devices. Introducing 2D materials in the structure of commercial electronic devices is challenging due to their complex synthesis and manipulation. The 2D-HETERO project will explore large wafer-scale (from 2-inch to 300 mm) and uniform growth of different 2D materials by chemical vapor deposition (CVD) method. Van der Waals heterostructures based on different 2D materials will be developed by stacking 2D materials through the direct growth or through clean and large wafer-scale transfer methods. The developed high quality and wafer-scale van der Waals heterostructures will be integrated in different nanoelectronics (mainly field effect transistors), with the goal of enhancing the device performance, yield and uniformity. Using an interdisciplinary approach that combines materials science, physics, electrical engineering, industry-relevant nanofabrication and characterization, 2D-HETERO will pave the way to industrialize 2D materials based nanoelectronics. The combination of learning through research and a comprehensive training plan, including both scientific and technological as well as soft skills, will strongly enhance the profile of the applicant and provide a boost for her future scientific career.

Оригинален текст от CORDIS (на английски).

Участници

INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM · LeuvenКоординаторБелгия