GDSNL · The Process of GaN-on-diamond with Si-based nanolayer SAB technology

Линиите свързват координатора с партньорите.

Накратко на български

Цел на проекта

GaN substrate materials have been increasing the demands of applications such as wireless communications, super-high computing, and power-management IC. The growing demands create substantial challenges for both the development of new semiconductor materials and their thermal power management in very large-scale integrated circuits. The highly localized Joule self-heating at the drain edge of the gate degrades the electrical performance and reliability of integrated circuits by introducing the device's channel thermally activated degradation mechanisms. To improve the radiation effect, the localized device's drain and channel regions heat generated in the active region of Si-substrate GaN high electron mobility transistors (HEMTs) device must be efficiently restrained. Third-generation semiconductor SiC and diamond, their appearance has improved high power reliability and performance, however, this direct growth requires an AlN or a SiN nucleation layer and suffers from the cost-effective large wafer. Besides, to date, GaN devices are mainly fabricated on sapphire, Si/SiC substrates having thermal conductivities of about 0.5, 1.5, and 4.0 W/cm·K, but the heat generated in GaN-on-diamond structure devices can be easily dissipated due to the excellent thermal conductivity characteristics of a diamond (thermal conductivity: ~22 W/cm·K). In order to conquer the growth of AlN or SiN GaN heterostructures on high poly- or micro-crystalline diamond and realize high-performance heat dissipation, a novel diamond growth on Si process using liquid gallium and titanium at low atmospheric pressure and a SAB Si-based nanolayer integration GaN-on-Si technology have been proposed. In this proposal, commercial GaN-on-Si and fabricated Diamond-on-Si were bonded with an extraordinarily low TBR and surface defects, this work opens up a new way for the fabrication of Diamond-based high-power wafers.

Оригинален текст от CORDIS (на английски).

Участници

• UNIVERSIDADE DE AVEIRO · AveiroКоординаторПортугалия
• INESC MICROSISTEMAS E NANOTECNOLOGIAS - INSTITUTO DE ENGENHARIA DE SISTEMAS E COMPUTADORES PARA OS MICROSISTEMAS E AS NANOTECNOLOGIAS · LisboaПортугалия

Връзки

• Виж в CORDIS
• DOI: 10.3030/101149632
• https://ec.europa.eu/research/participants/documents/downloadPublic?documentIds=080166e51d3bb6a4&appId=PPGMS