CoMiPCE · Coherent Microcomb-enabled Integrated Photonic Convolution Engine for Energy-Efficient AI

Линиите свързват координатора с партньорите.

Накратко на български

Цел на проекта

With rapid advances of artificial intelligence (AI), conventional electronic processors are constrained by bandwidth and energy efficiency in the post-Moore era, increasingly struggle to serve large-scale, high-concurrency AI tasks within the existing von Neumann-based framework. Leveraging the inherently high bandwidth, multiple dimensions, low latency, and superior energy-efficiency of light, photonic integrated circuits (PICs), on the other hand, are promising to provide a compelling pathway for advanced AI models. To achieve this goal, the main objective of the CoMiPCE research action is to realize a fully integrated photonic convolution engine (PCE) on a scalable silicon platform by combining best‑in‑class devices and processes through hybrid and heterogeneous integration. The CoMiPCE heterogeneously integrates a diverse set of photonic devices on silicon substrates, and co-integrates them with silicon PICs through hybrid packaging to build a fully integrated PCE system, targeting remarkable throughput and energy-efficiency for AI workloads, in which the convolution operator is implemented via composite time-phase-frequency-polarization encoding based on high-speed coherent microcomb modulation. The CoMiPCE addresses the bandwidth and energy efficiency of electronic accelerators by consolidating hybrid integrated silicon nitride self-injection-locking (SIL) microcomb, programmable silicon nitride weight spectral shaping, ultrafast coherent heterogeneous lithium tantalate modulation, erbium-doped silicon nitride waveguide dispersive delay with amplification, as well as coherent silicon PIC accumulation detection, into the full-chain hybrid integrated system. Collectively, the CoMiPCE will introduce coherent SIL microcomb source, hyper-dimensional encoding, high-speed analog computation, to deliver a fully integrated, highly parallel and scalable PCE for next‑generation energy-efficient AI hardware.

Оригинален текст от CORDIS (на английски).

Участници

• ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE · LausanneКоординаторШвейцария

Връзки

• Виж в CORDIS
• DOI: 10.3030/101285049