FP6Реинтеграция2005–2007

AUTOMATED DEBUGGING · Automated debugging using Boolean satisfiability in high performance VLSI Designs

6РП — Действия „Мария Кюри“

Период
2005-09-01 → 2007-08-31
Финансиране от ЕС
0 €
Участници
1
Схема
IRG

Линиите свързват координатора с партньорите. За проекти отпреди 2014 г. CORDIS не винаги дава точни координати. Тези точки са на ниво град или държава.

Накратко на български

Автоматизираното откриване на грешки в сложни интегрални схеми, като тези в компютрите и автомобилите, се изследва чрез специален софтуер за логически изчисления. Това помага за намаляване на разходите и времето за проверка на функционалността на чиповете преди производството им.

Този кратък обзор е генериран от изкуствен интелект

Кратко обяснение, генерирано от езиков модел по текста на CORDIS. Оригиналът е по-долу.

Цел на проекта

Integrated circuits are found in almost everything we use, from computers to automobiles, to appliances to medical devices. The chip industry is an integral part of the prosperity of the European economy. Due to reliability and strict time-to-market concerns, the community is challenged to design such complex devices, remain competitive and guarantee their correct functionality. In the design of these high-performance circuits it has been observed that verification and debugging is a major bottleneck in the integrated circuit design flow, i.e. up to 70% of the overall design costs are due to verification and debugging. Verification and debugging are tough" problems with a multi-million dollar worldwide market, significant financial investment by the Europe and Community and an average 15% growth per year.Although a plethora of efficient and cost-effective automated verification solutions have been developed, the debugging effort is still performed manually by the engineers. Manual debugging is a daunting, time-consuming and resource-intensive task that may jeopardize the design effort already invested in the design, it may delay product delivery and lower manufacture yield. This project encompasses three main targets. First, it will develop state-of-the-art automated tools that utilize contemporary Boolean Satisfiability solvers to enhance the verification process as they will diagnose and correct errors in high-performance designs.This builds upon our decade-long internationally recognized, patented and laboratory research awarded efforts. Secondly, the funds will be used to generate the momentum and establish a state-of-the-art VLSI laboratory at the Department of Informatics of the Athens University of Economics and Business. Finally, it will aid the PI, who is an expert in that field with a 15 year long research contribution in top-notch institutions in N.America, to have a smooth transition back to the European research workforce."

Оригинален текст от CORDIS (на английски).

Участници

  • ATHENS UNIVERSITY OF ECONOMICS AND BUSINESS DEPARTMENT OF INFORMATICSКоординаторНиво градГърция

Връзки

Данни: CORDIS, © Европейски съюз